The present application generally relates to manufacturing semiconductor products. More particularly, the present application relates to detecting foreign materials in a semiconductor manufacturing process.
A semiconductor product includes, but is not limited to a semiconductor chip, a semiconductor wafer and a semiconductor wafer lot. In a course of manufacturing a semiconductor product, including fabrication of high end microprocessors in a semiconductor fabrication facility, defects are detected, e.g., by semiconductor testers (e.g., tester model J973EP available from Teradyne®, Inc., etc.) which are due to the contamination of the semiconductor product by foreign materials or particles. A foreign material/particle refers to a material/particle that does not originate from a microcircuit and/or from any semiconductor material that is deposited with the microcircuit or that originates from the semiconductor material but in a way which was not expected during an ideal technological process. A foreign material/particle includes, but is not limited to, a human hair, dust, a piece of a boundary of a silicon wafer which was detached due to an overheating (chaffing), etc. Depending on size, location, and nature, these foreign particles can render a semiconductor product completely non functional. As microelectronic features decrease in size and feature densities increase, semiconductor products become more sensitive to contamination (e.g., foreign particles), and an effective reduction of the contamination is a requirement for achieving and maintaining high manufacturing yields.
Foreign particles may be generated in a course of many individual semiconductor product manufacturing operations, e.g., reactive ion etching and chemical vapor deposition. For instance, poorly designed reactive ion etch chambers may lead to extensive foreign particle deposition. Poorly controlled chamber evacuation steps may support condensation of gas phase species and subsequent foreign particle deposition in CVD (Chemical Vapor Deposition) reactors and RIE (Reactive Ion Etching) chambers. Semiconductor manufacturing process and tool design have at least one common objective: minimizing the number and size of foreign particles.
A deposition and adhesion of the foreign particles to a surface of a semiconductor product may be resulted from chemical and/or physical steps in a semiconductor manufacturing process. Thus, a reduction of the deposition and adhesion is another objective of semiconductor manufacturing process and tool design. In most cases, semiconductor products are inspected periodically for a contamination and especially following a completion of manufacturing processes known to be susceptible to foreign particle generation and/or deposition. However, in some cases, foreign particles detected on semiconductor products are not generated during a process immediately prior to the inspection. In these cases, foreign particles may be generated and deposited on semiconductor products upstream, perhaps far upstream from the inspection step. During subsequent handling or processing, foreign particles may be released from a semiconductor product, potentially contaminating a chamber and semiconductor products subsequently processed in that chamber.
Contamination measurements (i.e., the number of foreign particles on a wafer) influence a variety of actions in a semiconductor manufacturing environment. Contamination measurements are used to verify a quality of semiconductor processes and products. When unacceptable levels of contamination (e.g., the number of foreign particle is larger than a threshold) are detected, a variety of remedial measures addressing semiconductor products, chambers, or processes may be considered. For example, individual wafers or lots of wafers may be cleaned or reworked. Processing chambers may be cleaned or parts replaced. Chemical or physical elements of processes may be redesigned.
However, an effective identification and implementation of remedial measures requires a credible identification of the source of contamination, which has been difficult in a traditional solution. Thus, it is desirable to implement a model which will point to a semiconductor manufacturing step or tool, prior to an inspection of a semiconductor manufacturing tool and/or step, which is most likely the cause of the contamination.